ISVE Winter School on Digital System Design with Verilog(WS-DSDV-2024)

Dear Sir/Madam,

We are pleased to share that  Indian Society for VLSI Education(ISVE) Ranchi with collaborative institutions: Pt Ravi Shankar Shukla University Raipur, Dr DY Patil University Pune, Matrusri Engineering College Hyderbad, Chatnaya Bharati Institute of Technology Hyderabad, Shah & Anchor Kutchhi Engineering College Pune, Bapusaheb Shivajirao Deore College of Engineering Dhule, AISSMS Institute of Information Technology Pune, Dr Vijay Nath Educational Welfare Society Gorakhpur are offering Winter School on Digital System Design with Verilog for UG, PG, PhD Students & industry professionals and in other job oriented courses as per need of participants in Online Mode:-

ECE Based Winter School (ECE/ EEE/CSE Students) on

  1. Chip Design
  2. FPGA System Design
  3. Digital System Design with VHDL
  4. Digital System Design with Verilog
  5. Microelectronics and VLSI Design
  6. IC Packaging & Testing
  7. Micro-controller & Robotics
  8. Internet of Things
  9. 4G,5G, 6G and its Applications
  10. Embedded System Design 

CSE Based Winter School (ECE/ CSE/ EEE / IT Students) on

  1. Data Analytics & Data Science
  2. Quantum Computing
  3. Cyber Security & Deep Learning
  4. Artificial Intelligence & Machne Learning
  5. Cyber Physical Systems
  6. Programming in “C”, C++
  7. Programming in Java & Visual Basics

Winter School will be provided in above market job oriented areas and experts will be available world wide to guide the students. Expert will take the regular online classes, guide how to handle tools and software. They will also demonstrate the procedure of new software development.

Within duration of Winter School following assignments will be completed:-

  1. Literature Survey on Particular Topic whatever you selected from the above list
  2. Software or Hardware Model Development 
  3. Project Report
  4. One Research Paper Preparation and Submission to Good Conference/ Journal.
  5. Presentation on New Completed Project before Certification 

Registration Fees:

The ISVE is offering Three Level Courses with Collaborative Institutions:-

First Level Courses:

Winter School: 5 Days Winter School on Digital System Design with Verilog course normal fees is Rs 1500/- per subject. Students can opt more than one subject as per their requirements and interest.

Second Level Courses:

 One Month Winter School with Research Publications Rs 8000/- : This course covers with training program on recent job oriented topics and research publications on Projects/ Internship.

Third Level Courses:

6 Month training Program with Winter School and Placement interview Rs 80000/-. For this course 50% fees will be paid in advanced during  Registration of the course and 50% fees will be paid after placement of the candidate.

  • Classes timing will be 6:00pm to 8:00pm and related software will be provided to each candidate during training and some costly software lab will be provided neer by city  in the ISVE collaborative centres.
  • Meritorious students will get the Scholarship or Token Money as per feedback by expert committee.

Registration Form: Download here

Participant Information Sheet (After submission of scan copy of Registration Form try to fill this sheet): Click & Register here

Please download the Registration Form from the mail-attachment/website and send scan copy of filled Registration Form with NEFT receipt through e-mail for early registration. A/C Name: INDIAN SOCIETY FOR VLSI EDUCATION, A/C Number: 01670110061831, IFSC Code: UCBA0000167, Bank: UCO Bank, Branch: Mesra Ranchi, Address: BIT Main Building Mesra, Dist: Ranchi, State: Jharkhand, Contact No: 0651-2275829, Account Type: SB.

OR 

Find the ISVE QR code here:

 

Registration is open and last date for Registration 24th Dec 2024.

Program Schedule for Winter School on Digital System Design with Verilog (WS-DSDV-2024):  (From 26th  Dec to 30th Dec 2024)

Invitation for Inaugural & Technical Session of WS-DSDV-2024 from 26th Dec 2024 to 30th Dec 2024 from 6:00pm on wards

Job Opportunity: Skilled students, faculties, staffs and industry professionals are required in reputed institutions, industry, startups, Private and Govt initiative for Chip Designing, Verifications and Testing.  Where Verilog coding, Digital System Design understating are playing the vital roles.

Help Line:

For any clarification can contact at  isve.ranchi@gmail.com

ISVE Winter School Organizing Committee